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SiP Layout

Course Description
In this course, you learn the complete flow of a System in Package (SiP) design, from defining the module outline to placing components, defining a netlist, placement, routing, documentation, and manufacturing output. You also learn the complete design flow for a flip-chip and wire-bonded stacked die module using the Cadence® SiP Layout software.
    

Learning Objectives
After completing this course, you will be able to:
  • Develop a process flow to suit your design needs
  • Create a cross section and design constraints in your SiP layout database
  • Wire bond a stacked die design
  • Use the 3D viewer to check your design in three dimensions
  • Route an SiP design using interactive and automatic methods
  • Generate a variety of manufacturing outputs for your SiP design

Software Used in This Course
  • Cadence SiP Layout – XL
  • Advanced Package Router Option

Software Release(s)
  • 17.2-2016

Modules in this Course
  • Introducing SiP Layout
  • Creating a New Package Design
  • Modifying Components and Netlist
  • Setting Design Rules
  • Power Rings and Wire Bonding
  • Die Stacks and 3D Viewing
  • Routing
  • High-Density Interconnect
  • Embedded Components
  • Design Verification and Manufacturing Output

Audience
  • IC package and SiP designers

Prerequisites
Before taking this course, you should have a working knowledge of:
  • Single or multichip design and construction
 
Registration request

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  • Address38 HaBarzel St. Tel Aviv 6971054 Israel
  • Tel(972) 3 6444416
  • Fax(972) 3 6444462
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