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- Performs a wide variety of SI analyses
- Early detection of design errors to increase first-pass success
- Sets accurate constraints quickly and early in the process
- Improves product performance through solution-space exploration
- Explores alternative topologies in the earliest stages
- Generates S-parameters from signal topologies or analyzes signals in S-parameter format
- Generates estimated crosstalk tables to help reduce PCB crosstalk
- Verifies multiple-board and silicon-package-board signal paths
- Parallel bus analysis can begin early and continue through final signoff
- Enables large interconnect structures to be simulated
- Provides complete report data to compare against industry-standard protocols
- Easy-to-use block-level schematic simulation environment
- High-capacity channel simulation
- Hybrid solver for efficient S-parameter extraction of large interconnect structures
- 3D full-wave solver for detailed extraction of high-frequency structures
- S-parameter tuning, checking, and Broadband SPICE® model conversion
- Electrical compliance checking against multi-gigabit standard specifications
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