Support & Training
Allegro Sigrity OpimizePI
Quickly Optimize Your PCB Decap implementations for performance & cost Using Allegro Sigrity OptimizePI
Sigrity OptimizePI technology enables design teams to balance decoupling capacitor (decap) cost and performance for PCBs and IC packages.
Using OptimizePI you can run AC frequency analysis of boards and IC packages with support for pre-and post-layout decap studies that ensure high performance at system and component levels with a typical Decap cost savings of 15% to 50%.
OptimizePI is built on proven Sigrity hybrid electromagnetic circuit analysis technology in combination with our unique optimization engine to quickly pinpoint the best possible decap selections and placement locations.
During this lab-intensive workshop, you’ll learn how to:

» Automatically selecting and placing decoupling capacitors
» Eliminating decap over-design for printed circuit boards and IC packages
» Reducing PDS cost for new designs and post-production products
» Developing effective decap guidelines for packaged components
» Recapturing design area by eliminating unnecessary decaps
» Assessing PDS cost vs. performance trade-offs interactively
» Optimizing a PDS across the board / package interface
» Creating lowest-cost / best performance decap placement tables
Related Info

Who should attend:

» Signal integrity specialists
» Design engineers
» Engineering managers
» Project managers




Optimization objectives

Capacitor libraries

Device decoupling capacitor optimization
Target vs. threshold impedance 
EMI decoupling capacitor optimization
Capacitor mounting / loop inductance

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