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Allegro High-Speed Constraint Management for PCB
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Delivery Method: Instructor Led
Length: 1 day
Category: High-speed
Course Description
This is an Engineer Explorer course that is designed around advanced topics and exploration of the software. This course does not cover basic operations. If you are not actively using the software, then you need to complete the Allegro® PCB Editor course.
In this course, you apply and verify high-speed constraints across a design process. You learn to schedule nets, control impedance on nets, control the propagation delay from your drivers to receivers, and match the propagation delay of driver and receiver pairs.
Learning Objectives
After completing this course, you will be able to:
· Define specific net scheduling of high-speed nets
· Match the propagation delay of nets and connections
· Define minimum and maximum propagation delays for nets and connections
· Identify high-speed constraint violations
· Identify all the high-speed constraints that you can apply to the nets in your designs
· Create spacing and physical constraints as well as area constraints and class-to-class rules
Software Used in This Course
· Allegro PCB Design
Software Release(s)
· SPB 17.2
Course Agenda
· Database setup
· User-defined net scheduling
· Propagation delay
· Relative propagation delay
· Impedance constraints
· Total etch-length constraints
· System constraints
· Physical and spacing constraints
Audience
· PCB Designers
Prerequisites
You must have experience with or knowledge of the following:
The Allegro PCB Editor |
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